Date of Award

1-1-2011

Language

English

Document Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

College/School/Department

Department of Nanoscale Science and Engineering

Program

Nanoscale Engineering

Content Description

1 online resource (xviii, 100 pages) : illustrations (some color)

Dissertation/Thesis Chair

Bin Yu

Committee Members

Tong Zhang, Hassaram Bakhru, Michael A Carpenter, Mengbin Huang

Keywords

Interconnects (Integrated circuit technology), Graphene

Subject Categories

Nanoscience and Nanotechnology

Abstract

According to the ITRS Roadmap, on-chip interconnects wire width and current density will reach 22 nm and 5.8×106 A/cm2 in 2020, respectively. The electrical resistivity of Cu increases with scaled critical dimensions due to exacerbated carrier scattering at grain boundaries and interfaces, resulting in signal speed degradation. Electronmigration (EM)-related failure due to intensified current distribution posts extra limits to ultra-scaled systems. Innovative interconnect solutions are needed to tackle performance and scaling challenges.

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