Date of Award

8-1-2021

Language

English

Document Type

Master's Thesis

Degree Name

Master of Science (MS)

College/School/Department

Department of Electrical and Computer Engineering

Content Description

1 online resource (xiv, 81 pages) : illustrations.

Dissertation/Thesis Chair

Dr. Mohammed Agamy

Committee Members

Dr. Gary Saulnier, Dr. Aveek Dutta

Keywords

Active Gate Driver, Cascoded JFET, Gate Driver, MOSFET, Power Electronics, Silicon Carbide, Silicon carbide, Metal oxide semiconductor field-effect transistors, Field-effect transistors, Junction transistors, Switching power supplies, Wide gap semiconductors

Subject Categories

Electrical and Electronics

Abstract

Silicon Carbide (SiC) devices are slowly becoming one of the most reliable choices for high power density, high switching frequency applications with higher efficiency than Gallium Nitride (GaN) and Silicon (Si) devices. For a wide range of applications, such as Electric Motor Drives, Switching Power Supplies, and Renewable Energy Circuits, SiC devices are being tested and are found to yield prominent results.In this research, the characterization of two similarly rated commercially available SiC devices - a trench Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and a cascoded Junction Field Effect Transistor (JFET) are done. It is followed by a comparative analysis of both devices. Firstly, a Conventional Gate Drive (CGD) circuit is implemented, followed by the proposal and implementation of an Active Gate Driver (AGD) circuit. Both the devices are characterized for the CGD and AGD topologies to predict whether the proposed circuit improves the device performance, based on dI/dt and dV/dt characteristics. Switching characteristics during turn-on and turn-off for both the CGD and AGD topologies are compared and it is observed that the proposed AGD circuit does minimize the switching losses. The proposed AGD topology follows a simple design of using an N-channel MOSFET (NMOS) with a series resistor in parallel with the turn-on branch and a P-channel MOSFET (PMOS) with a series resistor in parallel with the turn-off branch of the gate driver circuit of the device under test (DUT). Characterization of the DUT is done using SPICE models of the devices for a comparative study. It is followed by the design of a printed circuit board (PCB) to implement both the CGD and AGD topologies which is compatible with both the DUTs. The DUTs are chosen as such that their characteristics are very similar to one another for an accurate comparative analysis. The devices are tested at rail voltages from 200V to 800V and at inductor currents from 10A to 60A. A detailed analysis shows a reduction in switching losses and shortening of the miller plateau in the proposed AGD circuit when the switching is made faster whereas over-voltage and over-current reduction when the switching is slowed down. Thus the proposed AGD circuit can be used to either speed up switching to minimize losses or slow down switching to mitigate noise issues dynamically during circuit operation, which was the intended purpose of this research.

Comments

Requested ProQuest takedown; end date on 08-02-22

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