Date of Award

Spring 2026

Language

English

Embargo Period

5-1-2026

Document Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

College/School/Department

Department of Nanoscale Science and Engineering

Program

Nanoscale Engineering

First Advisor

Nathaniel Cady

Committee Members

Karsten Beckmann, Carl Ventrice, Vincent LaBella, Jack Lombardi

Keywords

Nuvon M032, RRAM, in-memory computing, image processing, robot line following, edge detection, neuromorphic computing, ADC, DAC

Subject Categories

Nanoscience and Nanotechnology

Abstract

Conventional computing architectures are based on repeated data transfer between memory and the compute unit; however, artificial neural network applications rely on data-intensive vector-matrix multiplication as a mathematical operation, where data movement from memory to compute processor results in increased power consumption and reduced performance. Possible solutions to this problem include in-memory computing, which addresses the data transfer bottleneck by computing directly within the memory. To demonstrate the potential of this approach, our research group fabricated hafnium oxide-based resistive random-access memory (RRAM) arrays using a 65nm CMOS technology for in-memory compute operations. This work demonstrates the design and development of a microcontroller driven test printed circuit board to implement in-memory computing applications using these RRAM arrays. The system enables direct interface with CMOS/RRAM chips for application development and demonstrations. As a first step, a robot-based line following navigation application is demonstrated, followed by an edge‑detection image‑processing task to demonstrate the suitability of RRAM crossbars for vector‑based computation. Binary images were encoded using two discrete resistance states and the programmed output, while grayscale electron microscope image of a single RRAM device was programmed using eight analog resistance levels to represent 3‑bit pixel levels. In both cases, thresholding and edge‑detection kernels were applied directly to the programmed image data within the array, validating practical in‑memory compute functionality. These results highlight the capability of CMOS‑integrated RRAM for combined data storage and computation within emerging non‑von‑Neumann architectures. Moreover, the portable microcontroller‑based platform underscores the importance of accessible hardware for advancing real‑world memristor‑based computing applications

License

Creative Commons Attribution 4.0 International License
This work is licensed under a Creative Commons Attribution 4.0 International License.

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