Date of Award




Document Type


Degree Name

Doctor of Philosophy (PhD)


Department of Nanoscale Science and Engineering


Nanoscale Engineering

Content Description

1 online resource (ii, xvi, 175 pages) : illustrations (some color)

Dissertation/Thesis Chair

Robert Geer

Committee Members

Douglas Coolbaugh, Christopher Borst, Nathaniel Cady, Douglas La Tulipe


3D integration, Cu pillar, Cu-Cu bonding, field programmable gate array, heterogenous, TSV, Field programmable gate arrays, Three-dimensional integrated circuits

Subject Categories

Electrical and Electronics | Engineering | Nanoscience and Nanotechnology


Field Programmable Gate Arrays (FPGA) are integrated circuits which can implement virtually any digital function and can be configured by a designer after manufacturing. This is beneficial when dedicated application specific runs are not time or cost effective; however, this flexibility comes at the cost of a substantially higher interconnect overhead. Three-dimensional (3D) integration can offer significant improvements in the FPGA architecture by stacking multiple device layers and interconnecting them in the third or vertical dimension, through the substrate, where path lengths are greatly reduced. This will allow for a higher density of devices and improvements in power consumption, signal integrity and delay. Further, it facilities heterogeneous integration where additional functionalities can be incorporated into the same package as the FPGA, such as sensors, memories, and RF/analog or photonic chips, etc.